IEEE/ACM Intl. Symposium on Low Power Electronics and Design, ISLPED 2017


Title/Authors Title Research Artifacts
[?] A research artifact is any by-product of a research project that is not directly included in the published research paper. In Computer Science research this is often source code and data sets, but it could also be media, documentation, inputs to proof assistants, shell-scripts to run experiments, etc.
Details

Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors

Pavan Kumar Chundi, Yini Zhou, Martha A. Kim, Eren Kursun, Mingoo Seok

Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors

Details
Discussion Comments: 0
Verification: Authors have not verified information

QuARK: Quality-configurable approximate STT-MRAM cache by fine-grained tuning of reliability-energy knobs

Amir Mahdi Hosseini Monazzah, Majid Shoushtari, Seyed Ghassem Miremadi, Amir M. Rahmani, Nikil D. Dutt

QuARK: Quality-configurable approximate STT-MRAM cache by fine-grained tuning of reliability-energy knobs

Details
Discussion Comments: 0
Verification: Authors have not verified information

Online tuning of Dynamic Power Management for efficient execution of interactive workloads

James R. B. Bantock, Vasileios Tenentes, Bashir M. Al-Hashimi, Geoff V. Merrett

Online tuning of Dynamic Power Management for efficient execution of interactive workloads

Details
Discussion Comments: 0
Verification: Authors have not verified information

Invited paper: Secure swarm intelligence: A new approach to many-core power management

Augusto Vega, Alper Buyuktosunoglu, Pradip Bose

Invited paper: Secure swarm intelligence: A new approach to many-core power management

Details
Discussion Comments: 0
Verification: Authors have not verified information

Frequency and time domain analysis of power delivery network for monolithic 3D ICs

Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim

Frequency and time domain analysis of power delivery network for monolithic 3D ICs

Details
Discussion Comments: 0
Verification: Authors have not verified information

Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches

Tsai-Kan Chien, Lih-Yih Chiou, Yi-Sung Tsou, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu

Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches

Details
Discussion Comments: 0
Verification: Authors have not verified information

SENIN: An energy-efficient sparse neuromorphic system with on-chip learning

Myung-Hoon Choi, Seungkyu Choi, Jaehyeong Sim, Lee-Sup Kim

SENIN: An energy-efficient sparse neuromorphic system with on-chip learning

Details
Discussion Comments: 0
Verification: Authors have not verified information

A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function

Muqing Liu, Chen Zhou, Qianying Tang, Keshab K. Parhi, Chris H. Kim

A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function

Details
Discussion Comments: 0
Verification: Authors have not verified information

Tiguan: Energy-aware collision-free control for large-scale connected vehicles

Minghua Shen, Guojie Luo

Tiguan: Energy-aware collision-free control for large-scale connected vehicles

Details
Discussion Comments: 0
Verification: Authors have not verified information

AXSERBUS: A quality-configurable approximate serial bus for energy-efficient sensing

Younghyun Kim, Setareh Behroozi, Vijay Raghunathan, Anand Raghunathan

AXSERBUS: A quality-configurable approximate serial bus for energy-efficient sensing

Details
Discussion Comments: 0
Verification: Authors have not verified information

Invited paper: Ultra-low energy security circuit primitives for IoT platforms

Sanu Mathew, Sudhir Satpathy, Vikram Suresh, Ram Krishnamurthy

Invited paper: Ultra-low energy security circuit primitives for IoT platforms

Details
Discussion Comments: 0
Verification: Authors have not verified information

Gabor filter assisted energy efficient fast learning Convolutional Neural Networks

Syed Shakib Sarwar, Priyadarshini Panda, Kaushik Roy

Gabor filter assisted energy efficient fast learning Convolutional Neural Networks

Details
Discussion Comments: 0
Verification: Authors have not verified information

Placement mitigation techniques for power grid electromigration

Wei Ye, Yibo Lin, Xiaoqing Xu, Wuxi Li, Yiwei Fu, Yongsheng Sun, Canhui Zhan, David Z. Pan

Placement mitigation techniques for power grid electromigration

Details
Discussion Comments: 0
Verification: Authors have not verified information

A tunable Ultra Low Power inductorless Low Noise Amplifier exploiting body biasing of 28 nm FDSOI technology

Jennifer Zaini, Frédéric Hameau, Thierry Taris, Dominique Morche, Patrick Audebert, Eric Mercier

A tunable Ultra Low Power inductorless Low Noise Amplifier exploiting body biasing of 28 nm FDSOI technology

Details
Discussion Comments: 0
Verification: Authors have not verified information

E-Spector: Online energy inspection for Android applications

Chengke Wang, Yao Guo, Peng Shen, Xiangqun Chen

E-Spector: Online energy inspection for Android applications

Details
Discussion Comments: 0
Verification: Authors have not verified information

Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFET

Vivek Nautiyal, Gaurav Singla, Satinderjit Singh, Fakhruddin Ali Bohra, Jitendra Dasani, Lalit Gupta, Sagar Dwivedi

Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFET

Details
Discussion Comments: 0
Verification: Authors have not verified information

An improved clocking methodology for energy efficient low area AES architectures using register renaming

Siva Nishok Dhanuskodi, Daniel Holcomb

An improved clocking methodology for energy efficient low area AES architectures using register renaming

Details
Discussion Comments: 0
Verification: Authors have not verified information

Invited paper: Resilient and energy-secure power management

Pradip Bose, Alper Buyuktosunoglu

Invited paper: Resilient and energy-secure power management

Details
Discussion Comments: 0
Verification: Authors have not verified information

Spin-torque sensors with differential signaling for fast and energy efficient global interconnects

Zubair Azim, Kaushik Roy

Spin-torque sensors with differential signaling for fast and energy efficient global interconnects

Details
Discussion Comments: 0
Verification: Authors have not verified information

Frequency governors for cloud database OLTP workloads

Rathijit Sen, Alan Halverson

Frequency governors for cloud database OLTP workloads

Details
Discussion Comments: 0
Verification: Authors have not verified information

Power optimizations in MTJ-based Neural Networks through Stochastic Computing

Ankit Mondal, Ankur Srivastava

Power optimizations in MTJ-based Neural Networks through Stochastic Computing

Details
Discussion Comments: 0
Verification: Authors have not verified information

Message from the general co-chairs

David Garrett, Chia-Lin Yang

Message from the general co-chairs

Details
Discussion Comments: 0
Verification: Authors have not verified information

A simple yet efficient accuracy configurable adder design

Wenbin Xu, Sachin S. Sapatnekar, Jiang Hu

A simple yet efficient accuracy configurable adder design

Details
Discussion Comments: 0
Verification: Authors have not verified information

Design high bandwidth-density, low latency and energy efficient on-chip interconnect

Yong Wang, Hui Wu

Design high bandwidth-density, low latency and energy efficient on-chip interconnect

Details
Discussion Comments: 0
Verification: Authors have not verified information

Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reduction

Bhoopal Gunna, Lakshmi Bhamidipati, Houman Homayoun, Avesta Sasan

Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reduction

Details
Discussion Comments: 0
Verification: Authors have not verified information

SceneMan: Bridging mobile apps with system energy manager via scenario notification

Li Li, Jun Wang, Xiaorui Wang, Handong Ye, Ziang Hu

SceneMan: Bridging mobile apps with system energy manager via scenario notification

Details
Discussion Comments: 0
Verification: Authors have not verified information

Temporal codes in on-chip interconnects

Michael Mishkin, Nam Sung Kim, Mikko H. Lipasti

Temporal codes in on-chip interconnects

Details
Discussion Comments: 0
Verification: Authors have not verified information

Workload-driven frequency-aware battery sizing

Yukai Chen, Enrico Macii, Massimo Poncino

Workload-driven frequency-aware battery sizing

Details
Author Comments:
Discussion Comments: 0
Sharing: Research produced artifacts
Verification: Authors have verified information

Keynote: Peering into the post Moore's Law world

Todd M. Austin

Keynote: Peering into the post Moore's Law world

Details
Discussion Comments: 0
Verification: Author has not verified information

Efficient query processing in crossbar memory

Mohsen Imani, Saransh Gupta, Atl Arredondo, Tajana Rosing

Efficient query processing in crossbar memory

Details
Discussion Comments: 0
Verification: Authors have not verified information

Full chip power benefits with negative capacitance FETs

Sandeep Kumar Samal, Sourabh Khandelwal, Asif I. Khan, Sayeef Salahuddin, Chenming Hu, Sung Kyu Lim

Full chip power benefits with negative capacitance FETs

Details
Author Comments:
Discussion Comments: 0
Sharing: Research produced no artifacts
Verification: Authors have verified information

Secure Human-Internet using dynamic Human Body Communication

Shovan Maity, Debayan Das, Xinyi Jiang, Shreyas Sen

Secure Human-Internet using dynamic Human Body Communication

Details
Discussion Comments: 0
Verification: Authors have not verified information

Message from the program co-chairs

Jaydeep Kulkarni, Thomas F. Wenisch

Message from the program co-chairs

Details
Discussion Comments: 0
Verification: Authors have not verified information

A low power duobinary voltage mode transmitter

Ming-Hung Chien, Yen-Long Lee, Jih Ren Goh, Soon-Jyh Chang

A low power duobinary voltage mode transmitter

Details
Discussion Comments: 0
Verification: Authors have not verified information

Keynote: Architecture and software for emerging low-power systems

Wen-Mei W. Hwu

Keynote: Architecture and software for emerging low-power systems

Details
Discussion Comments: 0
Verification: Author has not verified information

Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities

Monodeep Kar, Arvind Singh, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay

Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities

Details
Discussion Comments: 0
Verification: Authors have not verified information

A Programmable Event-driven Architecture for Evaluating Spiking Neural Networks

Arnab Roy, Swagath Venkataramani, Neel Gala, Sanchari Sen, Kamakoti Veezhinathan, Anand Raghunathan

A Programmable Event-driven Architecture for Evaluating Spiking Neural Networks

Details
Discussion Comments: 0
Verification: Authors have not verified information

Signal strength-aware adaptive offloading for energy efficient mobile devices

Young Geun Kim, Sung Woo Chung

Signal strength-aware adaptive offloading for energy efficient mobile devices

Details
Discussion Comments: 0
Verification: Authors have not verified information

Low design overhead timing error correction scheme for elastic clock methodology

Sungju Ryu, Jongeun Koo, Jae-Joon Kim

Low design overhead timing error correction scheme for elastic clock methodology

Details
Discussion Comments: 0
Verification: Authors have not verified information

Efficient thermoelectric cooling for mobile devices

Youngmoon Lee, Eugene Kim, Kang G. Shin

Efficient thermoelectric cooling for mobile devices

Details
Discussion Comments: 0
Verification: Authors have not verified information

Reconfigurable thermoelectric generators for vehicle radiators energy harvesting

Donkyu Baek, Caiwen Ding, Sheng Lin, Donghwa Shin, Jaemin Kim, Xue Lin, Yanzhi Wang, Naehyuck Chang

Reconfigurable thermoelectric generators for vehicle radiators energy harvesting

Details
Discussion Comments: 0
Verification: Authors have not verified information

Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity

Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim

Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity

Details
Discussion Comments: 0
Verification: Authors have not verified information

Enabling efficient fine-grained DRAM activations with interleaved I/O

Chao Zhang, Xiaochen Guo

Enabling efficient fine-grained DRAM activations with interleaved I/O

Details
Discussion Comments: 0
Verification: Authors have not verified information

Bit-width reduction and customized register for low cost convolutional neural network accelerator

Kyungrak Choi, Woong Choi, Kyungho Shin, Jongsun Park

Bit-width reduction and customized register for low cost convolutional neural network accelerator

Details
Discussion Comments: 0
Verification: Authors have not verified information

Architecting large-scale SRAM arrays with monolithic 3D integration

Joonho Kong, Young-Ho Gong, Sung Woo Chung

Architecting large-scale SRAM arrays with monolithic 3D integration

Details
Discussion Comments: 0
Verification: Authors have not verified information

Battery assignment and scheduling for drone delivery businesses

Sangyoung Park, Licong Zhang, Samarjit Chakraborty

Battery assignment and scheduling for drone delivery businesses

Details
Discussion Comments: 0
Verification: Authors have not verified information

XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMs

Lei Jiang, Minje Kim, Wujie Wen, Danghui Wang

XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMs

Details
Discussion Comments: 0
Verification: Authors have not verified information

A low-power APUF-based environmental abnormality detection framework

Hongxiang Gu, Teng Xu, Miodrag Potkonjak

A low-power APUF-based environmental abnormality detection framework

Details
Discussion Comments: 0
Verification: Authors have not verified information

Low power in-memory computing based on dual-mode SOT-MRAM

Farhana Parveen, Shaahin Angizi, Zhezhi He, Deliang Fan

Low power in-memory computing based on dual-mode SOT-MRAM

Details
Discussion Comments: 0
Verification: Authors have not verified information

Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition

Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim

Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition

Details
Discussion Comments: 0
Verification: Authors have not verified information

An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar

Leibin Ni, Zichuan Liu, Wenhao Song, J. Joshua Yang, Hao Yu, Kanwen Wang, Yuangang Wang

An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar

Details
Discussion Comments: 0
Verification: Authors have not verified information

Keynote: A new Silicon Age 4.0: Generating semiconductor-intelligence paradigm with a Virtual Moore's Law Economics and Heterogeneous technologies

Nicky Liu

Keynote: A new Silicon Age 4.0: Generating semiconductor-intelligence paradigm with a Virtual Moore's Law Economics and Heterogeneous technologies

Details
Discussion Comments: 0
Verification: Author has not verified information

Tutorial: Tiny light-harvesting photovoltaic charger-supplies

Gabriel A. Rincón-Mora

Tutorial: Tiny light-harvesting photovoltaic charger-supplies

Details
Discussion Comments: 0
Verification: Author has not verified information

CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural Networks

Zhe Yuan, Yongpan Liu, Jinshan Yue, Jinyang Li, Huazhong Yang

CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural Networks

Details
Discussion Comments: 0
Verification: Authors have not verified information

Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltages

Sung Justin Kim, Doyun Kim, Mingoo Seok

Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltages

Details
Discussion Comments: 0
Verification: Authors have not verified information

A case for efficient accelerator design space exploration via Bayesian optimization

Brandon Reagen, José Miguel Hernández-Lobato, Robert Adolf, Michael A. Gelbart, Paul N. Whatmough, Gu-Yeon Wei, David M. Brooks

A case for efficient accelerator design space exploration via Bayesian optimization

Details
Discussion Comments: 0
Verification: Authors have not verified information

Exploring sparsity of firing activities and clock gating for energy-efficient recurrent spiking neural processors

Yu Liu, Yingyezhe Jin, Peng Li

Exploring sparsity of firing activities and clock gating for energy-efficient recurrent spiking neural processors

Details
Discussion Comments: 0
Verification: Authors have not verified information

A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication

Jihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae, Suhwan Kim

A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication

Details
Discussion Comments: 0
Verification: Authors have not verified information

A carbon nanotube transistor based RISC-V processor using pass transistor logic

Aporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski

A carbon nanotube transistor based RISC-V processor using pass transistor logic

Details
Discussion Comments: 0
Verification: Authors have not verified information

A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O

William Y. Li, Hyung Seok Kim, Kailash Chandrashekar, Khoa Minh Nguyen, Ashoke Ravi

A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O

Details
Discussion Comments: 0
Verification: Authors have not verified information

ShiftMask: Dynamic OLED power shifting based on visual acuity for interactive mobile applications

Han-Yi Lin, Pi-Cheng Hsiu, Tei-Wei Kuo

ShiftMask: Dynamic OLED power shifting based on visual acuity for interactive mobile applications

Details
Discussion Comments: 0
Verification: Authors have not verified information

Approximate memory compression for energy-efficiency

Ashish Ranjan, Arnab Raha, Vijay Raghunathan, Anand Raghunathan

Approximate memory compression for energy-efficiency

Details
Discussion Comments: 0
Verification: Authors have not verified information

A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders

Subhendu Roy, Yuzhe Ma, Jin Miao, Bei Yu

A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders

Details
Discussion Comments: 0
Verification: Authors have not verified information