| Title/Authors | Title | Research Artifacts
[?] A research
artifact is any by-product of a research project that is not
directly included in the published research paper. In Computer
Science research this is often source code and data sets, but
it could also be media, documentation, inputs to proof
assistants, shell-scripts to run experiments, etc.
|
Details |
|---|
|
Xin Han, Liang Zhao, Zhishan Guo, Xingwu Liu |
Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Zheng Dong, Cong Liu |
Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Albert Mo Kim Cheng, Panruo Wu |
Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Work-in-Progress: From Logical Time Scheduling to Real-Time Scheduling Frédéric Mallet, Min Zhang |
Work-in-Progress: From Logical Time Scheduling to Real-Time Scheduling Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Tuned Pipes: End-to-End Throughput and Delay Guarantees for USB Devices Ahmad Golchin, Zhuoqun Cheng, Richard West |
Tuned Pipes: End-to-End Throughput and Delay Guarantees for USB Devices Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
|
TDMH-MAC: Real-Time and Multi-hop in the Same Wireless MAC Federico Terraneo, Paolo Polidori, Alberto Leva, William Fornaciari |
TDMH-MAC: Real-Time and Multi-hop in the Same Wireless MAC Details |
Author Comments:
Discussion Comments:
0
Sharing:
Research produced artifacts
Verification:
Authors have
verified
information
|
|
|
Partitioned Real-Time NAND Flash Storage Katherine Missimer, Richard West |
Partitioned Real-Time NAND Flash Storage Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Kilho Lee, Taejune Park, Minsu Kim, Hoon Sung Chwa, Jinkyu Lee, Seungwon Shin, Insik Shin |
Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
|
Work-in-Progress: Lock-Based Software Transactional Memory for Real-Time Systems Catherine E. Nemitz, James H. Anderson |
Work-in-Progress: Lock-Based Software Transactional Memory for Real-Time Systems Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
An Efficient Knapsack-Based Approach for Calculating the Worst-Case Demand of AVR Tasks Sandeep Kumar Bijinemula, Aaron Willcock, Thidapat Chantem, Nathan Fisher |
An Efficient Knapsack-Based Approach for Calculating the Worst-Case Demand of AVR Tasks Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Author Comments:
Discussion Comments:
0
Sharing:
Research produced artifacts
Verification:
Authors have
verified
information
|
|
Work-in-Progress: Precise Scheduling of Mixed-Criticality Tasks by Varying Processor Speed Sai Sruti, Ashikahmed Bhuiyan, Zhishan Guo |
Work-in-Progress: Precise Scheduling of Mixed-Criticality Tasks by Varying Processor Speed Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Semi-Extended Tasks: Efficient Stack Sharing Among Blocking Threads Christian Dietrich, Daniel Lohmann |
Semi-Extended Tasks: Efficient Stack Sharing Among Blocking Threads Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Author Comments:
Discussion Comments:
0
Sharing:
Research produced artifacts
Verification:
Authors have
verified
information
|
|
Shedding the Shackles of Time-Division Multiplexing Farouk Hebbache, Mathieu Jan, Florian Brandner, Laurent Pautet |
Shedding the Shackles of Time-Division Multiplexing Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Work-in-Progress: Preference-Oriented Scheduling in Multiprocessor Real-Time Systems Qin Xia, Dakai Zhu, Hakan Aydin |
Work-in-Progress: Preference-Oriented Scheduling in Multiprocessor Real-Time Systems Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Design and Analysis of SIC: A Provably Timing-Predictable Pipelined Processor Core Sebastian Hahn, Jan Reineke |
Design and Analysis of SIC: A Provably Timing-Predictable Pipelined Processor Core Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
RIM: Robust Intersection Management for Connected Autonomous Vehicles Mohammad Khayatian, Mohammadreza Mehrabian, Aviral Shrivastava |
RIM: Robust Intersection Management for Connected Autonomous Vehicles Details |
Author Comments:
Discussion Comments:
0
Sharing:
Research produced artifacts
Verification:
Authors have
verified
information
|
|
|
Work-in-Progress: Making Machine Learning Real-Time Predictable Hang Xu, Frank Mueller |
Work-in-Progress: Making Machine Learning Real-Time Predictable Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Work in Progress: Combining Real Time and Multithreading Sims Osborne, James H. Anderson |
Work in Progress: Combining Real Time and Multithreading Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Analysis of Dynamic Memory Bandwidth Regulation in Multi-core Real-Time Systems Ankit Agrawal, Renato Mancuso, Rodolfo Pellizzoni, Gerhard Fohler |
Analysis of Dynamic Memory Bandwidth Regulation in Multi-core Real-Time Systems Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
On the Off-Chip Memory Latency of Real-Time Systems: Is DDR DRAM Really the Best Option? Mohamed Hassan |
On the Off-Chip Memory Latency of Real-Time Systems: Is DDR DRAM Really the Best Option? Details |
|
Discussion Comments:
0
Verification:
Author has
not verified
information
|
|
Shamit Bansal, Yecheng Zhao, Haibo Zeng, Kehua Yang |
Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Optimizing Network Calculus for Switched Ethernet Network with Deficit Round Robin Aakash Soni, Xiaoting Li, Jean-Luc Scharbarg, Christian Fraboul |
Optimizing Network Calculus for Switched Ethernet Network with Deficit Round Robin Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
bCharge: Data-Driven Real-Time Charging Scheduling for Large-Scale Electric Bus Fleets Guang Wang, Xiaoyang Xie, Fan Zhang, Yunhuai Liu, Desheng Zhang |
bCharge: Data-Driven Real-Time Charging Scheduling for Large-Scale Electric Bus Fleets Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
CycleTandem: Energy-Saving Scheduling for Real-Time Systems with Hardware Accelerators Sandeep D'Souza, Ragunathan Rajkumar |
CycleTandem: Energy-Saving Scheduling for Real-Time Systems with Hardware Accelerators Details |
Author Comments:
Discussion Comments:
0
Sharing:
Research produced artifacts
Verification:
Authors have
verified
information
|
|
|
Linwei Niu, Jonathan Musselwhite, Wei Li |
Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Dynamic Channel Selection for Real-Time Safety Message Communication in Vehicular Networks Yunhao Bai, Kuangyu Zheng, Zejiang Wang, Xiaorui Wang, Junmin Wang |
Dynamic Channel Selection for Real-Time Safety Message Communication in Vehicular Networks Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Work-in-Progress: Extending Buffer-Aware Worst-Case Timing Analysis of Wormhole NoCs Frédéric Giroudot, Ahlem Mifdaoui |
Work-in-Progress: Extending Buffer-Aware Worst-Case Timing Analysis of Wormhole NoCs Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Work-in-Progress: Real-Time Modeling for Intrusion Detection in Automotive Controller Area Network Habeeb Olufowobi, Gedare Bloom, Clinton Young, Joseph Zambreno |
Work-in-Progress: Real-Time Modeling for Intrusion Detection in Automotive Controller Area Network Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Dependency Graph Approach for Multiprocessor Real-Time Synchronization Jian-Jia Chen, Georg von der Brüggen, Junjie Shi, Niklas Ueter |
Dependency Graph Approach for Multiprocessor Real-Time Synchronization Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Schedulability Analysis of Adaptive Variable-Rate Tasks with Dynamic Switching Speeds Chao Peng, Yecheng Zhao, Haibo Zeng |
Schedulability Analysis of Adaptive Variable-Rate Tasks with Dynamic Switching Speeds Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
|
Peng Wu, Chenchen Fu, Minming Li, Yingchao Zhao, Chun Jason Xue, Song Han |
Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
ApNet: Approximation-Aware Real-Time Neural Network Soroush Bateni, Cong Liu |
ApNet: Approximation-Aware Real-Time Neural Network Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Scheduling Multi-periodic Mixed-Criticality DAGs on Multi-core Architectures Roberto Medina, Etienne Borde, Laurent Pautet |
Scheduling Multi-periodic Mixed-Criticality DAGs on Multi-core Architectures Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
An Optimal Semi-Partitioned Scheduler Assuming Arbitrary Affinity Masks Sergey Voronov, James H. Anderson |
An Optimal Semi-Partitioned Scheduler Assuming Arbitrary Affinity Masks Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
|
Real-Time Computing and the Evolution of Embedded System Designs Tei-Wei Kuo, Jian-Jia Chen, Yuan-Hao Chang, Pi-Cheng Hsiu |
Real-Time Computing and the Evolution of Embedded System Designs Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Uniprocessor Mixed-Criticality Scheduling with Graceful Degradation by Completion Rate Zhishan Guo, Kecheng Yang, Sudharsan Vaidhun, Samsil Arefin, Sajal K. Das, Haoyi Xiong |
Uniprocessor Mixed-Criticality Scheduling with Graceful Degradation by Completion Rate Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Rapid Routing with Guaranteed Delay Bounds Sanjoy Baruah |
Rapid Routing with Guaranteed Delay Bounds Details |
|
Discussion Comments:
0
Verification:
Author has
not verified
information
|
|
PredJoule: A Timing-Predictable Energy Optimization Framework for Deep Neural Networks Soroush Bateni, Husheng Zhou, Yuankun Zhu, Cong Liu |
PredJoule: A Timing-Predictable Energy Optimization Framework for Deep Neural Networks Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Automatic Trace Generation for Signal Temporal Logic Pavithra Prabhakar, Ratan Lal, James Kapinski |
Automatic Trace Generation for Signal Temporal Logic Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
A Generic Coq Proof of Typical Worst-Case Analysis Pascal Fradet, Maxime Lesourd, Jean-François Monin, Sophie Quinton |
A Generic Coq Proof of Typical Worst-Case Analysis Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Making OpenVX Really "Real Time" Ming Yang, Tanya Amert, Kecheng Yang, Nathan Otterness, James H. Anderson, F. Donelson Smith, Shige Wang |
Making OpenVX Really "Real Time" Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
|
The SRP Resource Sharing Protocol for Self-Suspending Tasks Geoffrey Nelissen, Alessandro Biondi |
The SRP Resource Sharing Protocol for Self-Suspending Tasks Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, Giorgio C. Buttazzo |
Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Distributed Real-Time Shortest-Paths Computations with the Field Calculus Giorgio Audrito, Ferruccio Damiani, Mirko Viroli, Enrico Bini |
Distributed Real-Time Shortest-Paths Computations with the Field Calculus Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Author Comments:
Discussion Comments:
0
Sharing:
Research produced artifacts
Verification:
Authors have
verified
information
|
|
Deadline-Based Scheduling for GPU with Preemption Support Nicola Capodieci, Roberto Cavicchioli, Marko Bertogna, Aingara Paramakuru |
Deadline-Based Scheduling for GPU with Preemption Support Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores Jordi Cardona, Carles Hernández, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla |
NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
BUNDLEP: Prioritizing Conflict Free Regions in Multi-threaded Programs to Improve Cache Reuse Corey Tessler, Nathan Fisher |
BUNDLEP: Prioritizing Conflict Free Regions in Multi-threaded Programs to Improve Cache Reuse Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
Artifact evaluation badge awarded
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Work-in-Progress: Response Time Bounds for Typed DAG Parallel Tasks on Heterogeneous Multi-cores Meiling Han, Nan Guan, Jinghao Sun, Qingqiang He, Qingxu Deng, Weichen Liu |
Work-in-Progress: Response Time Bounds for Typed DAG Parallel Tasks on Heterogeneous Multi-cores Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Reservation-Based Federated Scheduling for Parallel Real-Time Tasks Niklas Ueter, Georg von der Brüggen, Jian-Jia Chen, Jing Li, Kunal Agrawal |
Reservation-Based Federated Scheduling for Parallel Real-Time Tasks Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, Giorgio C. Buttazzo |
Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
|
Exploiting Locality for the Performance Analysis of Shared Memory Systems in MPSoCs Selma Saidi, Alexander Syring |
Exploiting Locality for the Performance Analysis of Shared Memory Systems in MPSoCs Details |
|
Discussion Comments:
0
Verification:
Authors have
not verified
information
|
|
Akram Hakiri, Aniruddha S. Gokhale |
Details |
Discussion Comments:
0
Verification:
Authors have
not verified
information
|