| Title/Authors | Title | Research Artifacts
[?] A research
artifact is any by-product of a research project that is not
directly included in the published research paper. In Computer
Science research this is often source code and data sets, but
it could also be media, documentation, inputs to proof
assistants, shell-scripts to run experiments, etc.
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SC-Haskell: Sequential Consistency in Languages That Minimize Mutable Shared Heap Michael Vollmer, Ryan G. Scott, Madanlal Musuvathi, Ryan R. Newton |
SC-Haskell: Sequential Consistency in Languages That Minimize Mutable Shared Heap Details |
Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
or similarly named committee. This is one such paper that passed review.
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S-Caffe: Co-designing MPI Runtimes and Caffe for Scalable Deep Learning on Modern GPU Clusters Ammar Ahmad Awan, Khaled Hamidouche, Jahanzeb Maqbool Hashmi, Dhabaleswar K. Panda |
S-Caffe: Co-designing MPI Runtimes and Caffe for Scalable Deep Learning on Modern GPU Clusters Details |
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Tapir: Embedding Fork-Join Parallelism into LLVM's Intermediate Representation Tao B. Schardl, William S. Moses, Charles E. Leiserson |
Tapir: Embedding Fork-Join Parallelism into LLVM's Intermediate Representation Details |
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Groute: An Asynchronous Multi-GPU Programming Model for Irregular Computations Tal Ben-Nun, Michael Sutton, Sreepathi Pai, Keshav Pingali |
Groute: An Asynchronous Multi-GPU Programming Model for Irregular Computations Details |
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Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils Nirmal Prajapati, Waruna Ranasinghe, Sanjay V. Rajopadhye, Rumen Andonov, Hristo Djidjev, Tobias Grosser |
Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils Details |
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Grammar-aware Parallelization for Scalable XPath Querying Lin Jiang, Zhijia Zhao |
Grammar-aware Parallelization for Scalable XPath Querying Details |
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Layout Lock: A Scalable Locking Paradigm for Concurrent Data Layout Modifications Nachshon Cohen, Arie Tal, Erez Petrank |
Layout Lock: A Scalable Locking Paradigm for Concurrent Data Layout Modifications Details |
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Pedro Ramalhete, Andreia Correia |
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Optimizing the Four-Index Integral Transform Using Data Movement Lower Bounds Analysis Samyam Rajbhandari, Fabrice Rastello, Karol Kowalski, Sriram Krishnamoorthy, P. Sadayappan |
Optimizing the Four-Index Integral Transform Using Data Movement Lower Bounds Analysis Details |
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POSTER: IOGP: An Incremental Online Graph Partitioning for Large-Scale Distributed Graph Databases Dong Dai, Wei Zhang, Yong Chen |
POSTER: IOGP: An Incremental Online Graph Partitioning for Large-Scale Distributed Graph Databases Details |
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Processor-Oblivious Record and Replay Robert Utterback, Kunal Agrawal, I-Ting Angelina Lee, Milind Kulkarni |
Processor-Oblivious Record and Replay Details |
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Xiongchao Tang, Jidong Zhai, Bowen Yu, Wenguang Chen, Weimin Zheng |
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Model-based Iterative CT Image Reconstruction on GPUs Amit Sabne, Xiao Wang, Sherman J. Kisner, Charles A. Bouman, Anand Raghunathan, Samuel P. Midkiff |
Model-based Iterative CT Image Reconstruction on GPUs Details |
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Eunomia: Scaling Concurrent Search Trees under Contention Using HTM Xin Wang, Weihua Zhang, Zhaoguo Wang, Ziyun Wei, Haibo Chen, Wenyun Zhao |
Eunomia: Scaling Concurrent Search Trees under Contention Using HTM Details |
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EffiSha: A Software Framework for Enabling Effficient Preemptive Scheduling of GPU Guoyang Chen, Yue Zhao, Xipeng Shen, Huiyang Zhou |
EffiSha: A Software Framework for Enabling Effficient Preemptive Scheduling of GPU Details |
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Pagoda: Fine-Grained GPU Resource Virtualization for Narrow Tasks Tsung Tai Yeh, Amit Sabne, Putt Sakdhnagool, Rudolf Eigenmann, Timothy G. Rogers |
Pagoda: Fine-Grained GPU Resource Virtualization for Narrow Tasks Details |
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Function Call Re-Vectorization Rubens E. A. Moreira, Sylvain Collange, Fernando Magno Quintão Pereira |
Function Call Re-Vectorization Details |
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Vignesh Balaji, Dhruva Tirumala, Brandon Lucia |
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Umut A. Acar, Naama Ben-David, Mike Rainey |
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Artifacts for some papers are reviewed by an artifact evaluation, reproducibility,
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POSTER: State Teleportation via Hardware Transactional Memory Nachshon Cohen, Maurice Herlihy, Erez Petrank, Elias Wald |
POSTER: State Teleportation via Hardware Transactional Memory Details |
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Checking Concurrent Data Structures Under the C/C++11 Memory Model Peizhao Ou, Brian Demsky |
Checking Concurrent Data Structures Under the C/C++11 Memory Model Details |
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A Multicore Path to Connectomics-on-Demand Alexander Matveev, Yaron Meirovitch, Hayk Saribekyan, Wiktor Jakubiuk, Tim Kaler, Gergely Ódor, David M. Budden, Aleksandar Zlateski, Nir Shavit |
A Multicore Path to Connectomics-on-Demand Details |
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POSTER: On the Problem of Consistency Exceptions in the Context of Strong Memory Models Minjia Zhang, Swarnendu Biswas, Michael D. Bond |
POSTER: On the Problem of Consistency Exceptions in the Context of Strong Memory Models Details |
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POSTER: Reuse, don't Recycle: Transforming Algorithms that Throw Away Descriptors Maya Arbel-Raviv, Trevor Brown |
POSTER: Reuse, don't Recycle: Transforming Algorithms that Throw Away Descriptors Details |
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POSTER: Cache-Oblivious MPI All-to-All Communications on Many-Core Architectures Shigang Li, Yunquan Zhang, Torsten Hoefler |
POSTER: Cache-Oblivious MPI All-to-All Communications on Many-Core Architectures Details |
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Synchronized-by-Default Concurrency for Shared-Memory Systems Martin Bättig, Thomas R. Gross |
Synchronized-by-Default Concurrency for Shared-Memory Systems Details |
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Peng Jiang, Gagan Agrawal |
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Silent Data Corruption Resilient Two-sided Matrix Factorizations Panruo Wu, Nathan DeBardeleben, Qiang Guan, Sean Blanchard, Jieyang Chen, Dingwen Tao, Xin Liang, Kaiming Ouyang, Zizhong Chen |
Silent Data Corruption Resilient Two-sided Matrix Factorizations Details |
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Jesun Sahariar Firoz, Thejaka Amila Kanewala, Marcin Zalewski, Martina Barnas, Andrew Lumsdaine |
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Understanding the GPU Microarchitecture to Achieve Bare-Metal Performance Tuning Xiuxia Zhang, Guangming Tan, Shuangbai Xue, Jiajia Li, Ke-ren Zhou, Mingyu Chen |
Understanding the GPU Microarchitecture to Achieve Bare-Metal Performance Tuning Details |
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Using Butterfly-Patterned Partial Sums to Draw from Discrete Distributions Guy L. Steele Jr., Jean-Baptiste Tristan |
Using Butterfly-Patterned Partial Sums to Draw from Discrete Distributions Details |
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POSTER: A GPU-Friendly Skiplist Algorithm Nurit Moscovici, Nachshon Cohen, Erez Petrank |
POSTER: A GPU-Friendly Skiplist Algorithm Details |
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POSTER: MAPA: An Automatic Memory Access Pattern Analyzer for GPU Applications Gangwon Jo, Jaehoon Jung, Jiyoung Park, Jaejin Lee |
POSTER: MAPA: An Automatic Memory Access Pattern Analyzer for GPU Applications Details |
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POSTER: Provably Efficient Scheduling of Cache-Oblivious Wavefront Algorithms Rezaul Chowdhury, Pramod Ganapathi, Yuan Tang, Jesmin Jahan Tithi |
POSTER: Provably Efficient Scheduling of Cache-Oblivious Wavefront Algorithms Details |
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KiWi: A Key-Value Map for Scalable Real-Time Analytics Dmitry Basin, Edward Bortnikov, Anastasia Braginsky, Guy Golan-Gueta, Eshcar Hillel, Idit Keidar, Moshe Sulamy |
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It's Time for a New Old Language Guy L. Steele Jr. |
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Isoefficiency in Practice: Configuring and Understanding the Performance of Task-based Applications Sergei Shudler, Alexandru Calotoiu, Torsten Hoefler, Felix Wolf |
Isoefficiency in Practice: Configuring and Understanding the Performance of Task-based Applications Details |
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POSTER: Recovering Performance for Vector-based Machine Learning on Managed Runtime Mingyu Wu, Haibing Guan, Binyu Zang, Haibo Chen |
POSTER: Recovering Performance for Vector-based Machine Learning on Managed Runtime Details |
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Noise Injection Techniques to Expose Subtle and Unintended Message Races Kento Sato, Dong H. Ahn, Ignacio Laguna, Gregory L. Lee, Martin Schulz, Christopher M. Chambreau |
Noise Injection Techniques to Expose Subtle and Unintended Message Races Details |
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POSTER: A Wait-Free Queue with Wait-Free Memory Reclamation Pedro Ramalhete, Andreia Correia |
POSTER: A Wait-Free Queue with Wait-Free Memory Reclamation Details |
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POSTER: An Infrastructure for HPC Knowledge Sharing and Reuse Yue Zhao, Chunhua Liao, Xipeng Shen |
POSTER: An Infrastructure for HPC Knowledge Sharing and Reuse Details |
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POSTER: HythTM: Extending the Applicability of Intel TSX Hardware Transactional Support Arnamoy Bhattacharyya, Mike Dai Wang, Mihai Burcea, Yi Ding, Allen Deng, Sai Varikooty, Shafaaf Hossain, Cristiana Amza |
POSTER: HythTM: Extending the Applicability of Intel TSX Hardware Transactional Support Details |
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Thread Data Sharing in Cache: Theory and Measurement Hao Luo, Pengcheng Li, Chen Ding |
Thread Data Sharing in Cache: Theory and Measurement Details |
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POSTER: Automated Load Balancer Selection Based on Application Characteristics Harshitha Menon, Kavitha Chandrasekar, Laxmikant V. Kalé |
POSTER: Automated Load Balancer Selection Based on Application Characteristics Details |
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Exploiting Vector and Multicore Parallelism for Recursive, Data- and Task-Parallel Programs Bin Ren, Sriram Krishnamoorthy, Kunal Agrawal, Milind Kulkarni |
Exploiting Vector and Multicore Parallelism for Recursive, Data- and Task-Parallel Programs Details |
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POSTER: STAR (Space-Time Adaptive and Reductive) Algorithms for Real-World Space-Time Optimality Yuan Tang, Ronghui You |
POSTER: STAR (Space-Time Adaptive and Reductive) Algorithms for Real-World Space-Time Optimality Details |
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An Efficient Abortable-locking Protocol for Multi-level NUMA Systems Milind Chabbi, Abdelhalim Amer, Shasha Wen, Xu Liu |
An Efficient Abortable-locking Protocol for Multi-level NUMA Systems Details |
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