| Title/Authors | Title | Research Artifacts
[?] A research
artifact is any by-product of a research project that is not
directly included in the published research paper. In Computer
Science research this is often source code and data sets, but
it could also be media, documentation, inputs to proof
assistants, shell-scripts to run experiments, etc.
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Towards memory-efficient processing-in-memory architecture for convolutional neural networks Yi Wang, Mingxu Zhang, Jing Yang |
Towards memory-efficient processing-in-memory architecture for convolutional neural networks Details |
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Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu |
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Min Zhang, Yunhui Ying |
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AOT vs. JIT: impact of profile data on code quality April W. Wade, Prasad A. Kulkarni, Michael R. Jantz |
AOT vs. JIT: impact of profile data on code quality Details |
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Adaptive optimization for OpenCL programs on embedded heterogeneous systems Ben Taylor, Vicent Sanz Marco, Zheng Wang |
Adaptive optimization for OpenCL programs on embedded heterogeneous systems Details |
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OSEK-V: application-specific RTOS instantiation in hardware Christian Dietrich, Daniel Lohmann |
OSEK-V: application-specific RTOS instantiation in hardware Details |
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Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, Jingtong Hu |
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Weiwen Jiang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Hailiang Dong, Xianzhang Chen |
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Integrated IoT programming with selective abstraction Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, Hanjun Kim |
Integrated IoT programming with selective abstraction Details |
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Unified nvTCAM and sTCAM architecture for improving packet matching performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, Huawei Huang |
Unified nvTCAM and sTCAM architecture for improving packet matching performance Details |
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Auto-vectorization for image processing DSLs Oliver Reiche, Christof Kobylko, Frank Hannig, Jürgen Teich |
Auto-vectorization for image processing DSLs Details |
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Integrating task scheduling and cache locking for multicore real-time embedded systems Wenguang Zheng, Hui Wu, Chuanyao Nie |
Integrating task scheduling and cache locking for multicore real-time embedded systems Details |
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