ACM SIGPLAN/SIGBED Intl. Conf. on Langs., Compilers, & Tools for Emb. Sys., LCTES 2017


Article Details
Title: Integrating task scheduling and cache locking for multicore real-time embedded systems
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Authors: Wenguang Zheng
  • Tianjin University of Technology
Hui Wu
  • The University of New South Wales
Chuanyao Nie
  • The University of New South Wales
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DBLP Key: conf/lctrts/ZhengWN17
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