| Title/Authors | Title | Research Artifacts
[?] A research
artifact is any by-product of a research project that is not
directly included in the published research paper. In Computer
Science research this is often source code and data sets, but
it could also be media, documentation, inputs to proof
assistants, shell-scripts to run experiments, etc.
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Simulation and Analysis Engine for Scale-Out Workloads Nadav Chachmon, Daniel Richins, Robert S. Cohn, Magnus Christensson, Wenzhi Cui, Vijay Janapa Reddi |
Simulation and Analysis Engine for Scale-Out Workloads Details |
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Origami: Folding Warps for Energy Efficient GPUs Mohammad Abdel-Majeed, Daniel Wong, Justin Kuang, Murali Annavaram |
Origami: Folding Warps for Energy Efficient GPUs Details |
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CuMAS: Data Transfer Aware Multi-Application Scheduling for Shared GPUs Mehmet E. Belviranli, Farzad Khorasani, Laxmi N. Bhuyan, Rajiv Gupta |
CuMAS: Data Transfer Aware Multi-Application Scheduling for Shared GPUs Details |
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Optimizing Sparse Matrix-Vector Multiplication for Large-Scale Data Analytics Daniele Buono, Fabrizio Petrini, Fabio Checconi, Xing Liu, Xinyu Que, Chris Long, Tai-Ching Tuan |
Optimizing Sparse Matrix-Vector Multiplication for Large-Scale Data Analytics Details |
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GCaR: Garbage Collection aware Cache Management with Improved Performance for Flash-based SSDs Suzhen Wu, Yanping Lin, Bo Mao, Hong Jiang |
GCaR: Garbage Collection aware Cache Management with Improved Performance for Flash-based SSDs Details |
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Xu Zhou, Haoran Cai, Qiang Cao, Hong Jiang, Lei Tian, Changsheng Xie |
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Fast Multiplication in Binary Fields on GPUs via Register Cache Eli Ben-Sasson, Matan Hamilis, Mark Silberstein, Eran Tromer |
Fast Multiplication in Binary Fields on GPUs via Register Cache Details |
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TurboTiling: Leveraging Prefetching to Boost Performance of Tiled Codes Sanyam Mehta, Rajat Garg, Nishad Trivedi, Pen-Chung Yew |
TurboTiling: Leveraging Prefetching to Boost Performance of Tiled Codes Details |
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Coherence-Free Multiview: Enabling Reference-Discerning Data Placement on GPU Guoyang Chen, Xipeng Shen |
Coherence-Free Multiview: Enabling Reference-Discerning Data Placement on GPU Details |
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DSMR: A Parallel Algorithm for Single-Source Shortest Path Problem Saeed Maleki, Donald Nguyen, Andrew Lenharth, María Jesús Garzarán, David A. Padua, Keshav Pingali |
DSMR: A Parallel Algorithm for Single-Source Shortest Path Problem Details |
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Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos |
Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks Details |
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SARVAVID: A Domain Specific Language for Developing Scalable Computational Genomics Applications Kanak Mahadik, Christopher Wright, Jinyi Zhang, Milind Kulkarni, Saurabh Bagchi, Somali Chaterji |
SARVAVID: A Domain Specific Language for Developing Scalable Computational Genomics Applications Details |
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Mini-Ckpts: Surviving OS Failures in Persistent Memory David Fiala, Frank Mueller, Kurt B. Ferreira, Christian Engelmann |
Mini-Ckpts: Surviving OS Failures in Persistent Memory Details |
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Barrier-Aware Warp Scheduling for Throughput Processors Yuxi Liu, Zhibin Yu, Lieven Eeckhout, Vijay Janapa Reddi, Yingwei Luo, Xiaolin Wang, Zhenlin Wang, Cheng-Zhong Xu |
Barrier-Aware Warp Scheduling for Throughput Processors Details |
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Variation Among Processors Under Turbo Boost in HPC Systems Bilge Acun, Phil Miller, Laxmikant V. Kalé |
Variation Among Processors Under Turbo Boost in HPC Systems Details |
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Fairness-oriented OS Scheduling Support for Multicore Systems Changdae Kim, Jaehyuk Huh |
Fairness-oriented OS Scheduling Support for Multicore Systems Details |
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Noise Aware Scheduling in Data Centers Hameedah Sultan, Arpit Katiyar, Smruti R. Sarangi |
Noise Aware Scheduling in Data Centers Details |
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Fei Lei, Dezun Dong, Xiangke Liao, Xing Su, Cunlu Li |
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Replichard: Towards Tradeoff between Consistency and Performance for Metadata Zhiying Li, Ruini Xue, Lixiang Ao |
Replichard: Towards Tradeoff between Consistency and Performance for Metadata Details |
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Reusing Data Reorganization for Efficient SIMD Parallelization of Adaptive Irregular Applications Peng Jiang, Linchuan Chen, Gagan Agrawal |
Reusing Data Reorganization for Efficient SIMD Parallelization of Adaptive Irregular Applications Details |
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Peruse and Profit: Estimating the Accelerability of Loops Snehasish Kumar, Vijayalakshmi Srinivasan, Amirali Sharifian, Nick Sumner, Arrvindh Shriraman |
Peruse and Profit: Estimating the Accelerability of Loops Details |
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Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes Dimitrios Chasapis, Marc Casas, Miquel Moretó, Martin Schulz, Eduard Ayguadé, Jesús Labarta, Mateo Valero |
Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes Details |
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Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration Emilio G. Cota, Paolo Mantovani, Luca P. Carloni |
Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration Details |
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Towards an Adaptive Multi-Power-Source Datacenter Longjun Liu, Hongbin Sun, Chao Li, Yang Hu, Nanning Zheng, Tao Li |
Towards an Adaptive Multi-Power-Source Datacenter Details |
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BLASX: A High Performance Level-3 BLAS Library for Heterogeneous Multi-GPU Computing Linnan Wang, Wei Wu, Zenglin Xu, Jianxiong Xiao, Yi Yang |
BLASX: A High Performance Level-3 BLAS Library for Heterogeneous Multi-GPU Computing Details |
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SReplay: Deterministic Sub-Group Replay for One-Sided Communication Xuehai Qian, Koushik Sen, Paul Hargrove, Costin Iancu |
SReplay: Deterministic Sub-Group Replay for One-Sided Communication Details |
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Tag-Split Cache for Efficient GPGPU Cache Utilization Lingda Li, Ari B. Hayes, Shuaiwen Leon Song, Eddy Z. Zhang |
Tag-Split Cache for Efficient GPGPU Cache Utilization Details |
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Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures Yuan Yao, Guanhua Wang, Zhiguo Ge, Tulika Mitra, Wenzhi Chen, Naxin Zhang |
Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures Details |
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Siddharth Rai, Mainak Chaudhuri |
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Polly-ACC Transparent compilation to heterogeneous hardware Tobias Grosser, Torsten Hoefler |
Polly-ACC Transparent compilation to heterogeneous hardware Details |
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Write-Aware Management of NVM-based Memory Extensions Amro Awad, Sergey Blagodurov, Yan Solihin |
Write-Aware Management of NVM-based Memory Extensions Details |
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SFU-Driven Transparent Approximation Acceleration on GPUs Ang Li, Shuaiwen Leon Song, Mark Wijtvliet, Akash Kumar, Henk Corporaal |
SFU-Driven Transparent Approximation Acceleration on GPUs Details |
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Prefetching Techniques for Near-memory Throughput Processors Reena Panda, Yasuko Eckert, Nuwan Jayasena, Onur Kayiran, Michael Boyer, Lizy Kurian John |
Prefetching Techniques for Near-memory Throughput Processors Details |
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Balanced Hashing and Efficient GPU Sparse General Matrix-Matrix Multiplication Pham Nguyen Quang Anh, Rui Fan, Yonggang Wen |
Balanced Hashing and Efficient GPU Sparse General Matrix-Matrix Multiplication Details |
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Graph Prefetching Using Data Structure Knowledge Sam Ainsworth, Timothy M. Jones |
Graph Prefetching Using Data Structure Knowledge Details |
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Parallel Transposition of Sparse Data Structures Hao Wang, Weifeng Liu, Kaixi Hou, Wu-chun Feng |
Parallel Transposition of Sparse Data Structures Details |
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HOPE: Enabling Efficient Service Orchestration in Software-Defined Data Centers Yang Hu, Chao Li, Longjun Liu, Tao Li |
HOPE: Enabling Efficient Service Orchestration in Software-Defined Data Centers Details |
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Lynx: Using OS and Hardware Support for Fast Fine-Grained Inter-Core Communication Konstantina Mitropoulou, Vasileios Porpodas, Xiaochun Zhang, Timothy M. Jones |
Lynx: Using OS and Hardware Support for Fast Fine-Grained Inter-Core Communication Details |
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AEQUITAS: Coordinated Energy Management Across Parallel Applications Haris Ribic, Yu David Liu |
AEQUITAS: Coordinated Energy Management Across Parallel Applications Details |
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Hybrid CPU-GPU scheduling and execution of tree traversals Jianqiao Liu, Nikhil Hegde, Milind Kulkarni |
Hybrid CPU-GPU scheduling and execution of tree traversals Details |
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Scheduling Tasks with Mixed Timing Constraints in GPU-Powered Real-Time Systems Yunlong Xu, Rui Wang, Tao Li, Mingcong Song, Lan Gao, Zhongzhi Luan, Depei Qian |
Scheduling Tasks with Mixed Timing Constraints in GPU-Powered Real-Time Systems Details |
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TokenTLB: A Token-Based Page Classification Approach Albert Esteve, Alberto Ros, Antonio Robles, María Engracia Gómez, José Duato |
TokenTLB: A Token-Based Page Classification Approach Details |
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High Performance Design for HDFS with Byte-Addressability of NVM and RDMA Nusrat Sharmin Islam, Md. Wasi-ur-Rahman, Xiaoyi Lu, Dhabaleswar K. Panda |
High Performance Design for HDFS with Byte-Addressability of NVM and RDMA Details |
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