| Title: |
Barrier-Aware Warp Scheduling for Throughput Processors |
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| Authors: |
Yuxi Liu |
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Peking University
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Chinese Academy of Sciences, Shenzhen Institute of Advanced Technology
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Ghent University
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| Zhibin Yu |
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Chinese Academy of Sciences, Shenzhen Institute of Advanced Technology
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| Lieven Eeckhout |
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| Vijay Janapa Reddi |
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University of Texas at Austin
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| Yingwei Luo |
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| Xiaolin Wang |
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| Zhenlin Wang |
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| Cheng-Zhong Xu |
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Chinese Academy of Sciences, Shenzhen Institute of Advanced Technology
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Wayne State University
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| Sharing: |
Unknown
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| Verification: |
Authors have
not verified
information
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| Artifact Evaluation Badge: |
none
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| DBLP Key: |
conf/ics/LiuYERLWWX16
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