| Title/Authors | Title | Research Artifacts
[?] A research
artifact is any by-product of a research project that is not
directly included in the published research paper. In Computer
Science research this is often source code and data sets, but
it could also be media, documentation, inputs to proof
assistants, shell-scripts to run experiments, etc.
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An Efficient, Self-Contained, On-chip Directory: DIR1-SISD Mahdad Davari, Alberto Ros, Erik Hagersten, Stefanos Kaxiras |
An Efficient, Self-Contained, On-chip Directory: DIR1-SISD Details |
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Runtime-Guided Management of Scratchpad Memories in Multicore Architectures Lluc Alvarez, Miquel Moretó, Marc Casas, Emilio Castillo, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Mateo Valero |
Runtime-Guided Management of Scratchpad Memories in Multicore Architectures Details |
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Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu |
Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance Details |
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Dealing with the Unknown: Resilience to Prediction Errors Subrata Mitra, Greg Bronevetsky, Suhas Javagal, Saurabh Bagchi |
Dealing with the Unknown: Resilience to Prediction Errors Details |
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Phase Aware Warp Scheduling: Mitigating Effects of Phase Behavior in GPGPU Applications Mihir Awatramani, Xian Zhu, Joseph Zambreno, Diane T. Rover |
Phase Aware Warp Scheduling: Mitigating Effects of Phase Behavior in GPGPU Applications Details |
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Using Compiler Techniques to Improve Automatic Performance Modeling Arnamoy Bhattacharyya, Grzegorz Kwasniewski, Torsten Hoefler |
Using Compiler Techniques to Improve Automatic Performance Modeling Details |
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RC3: Consistency Directed Cache Coherence for x86-64 with RC Extensions Marco Elver, Vijay Nagarajan |
RC3: Consistency Directed Cache Coherence for x86-64 with RC Extensions Details |
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Towards General-Purpose Neural Network Computing Schuyler Eldridge, Amos Waterland, Margo Seltzer, Jonathan Appavoo, Ajay Joshi |
Towards General-Purpose Neural Network Computing Details |
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An Efficient Vectorization Approach to Nested Thread-level Parallelism for CUDA GPUs Shixiong Xu, David Gregg |
An Efficient Vectorization Approach to Nested Thread-level Parallelism for CUDA GPUs Details |
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Tracking and Reducing Uncertainty in Dataflow Analysis-Based Dynamic Parallel Monitoring Michelle L. Goodstein, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry |
Tracking and Reducing Uncertainty in Dataflow Analysis-Based Dynamic Parallel Monitoring Details |
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Using Hybrid Schedules to Safely Outperform Classical Polyhedral Schedules Tian Jin |
Using Hybrid Schedules to Safely Outperform Classical Polyhedral Schedules Details |
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Load Balancing in Decoupled Look-ahead: A Do-It-Yourself (DIY) Approach Raj Parihar, Michael C. Huang |
Load Balancing in Decoupled Look-ahead: A Do-It-Yourself (DIY) Approach Details |
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MeToo: Stochastic Modeling of Memory Traffic Timing Behavior Yipeng Wang, Ganesh Balakrishnan, Yan Solihin |
MeToo: Stochastic Modeling of Memory Traffic Timing Behavior Details |
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Parallel Methods for Verifying the Consistency of Weakly-Ordered Architectures Adam McLaughlin, Duane Merrill, Michael Garland, David A. Bader |
Parallel Methods for Verifying the Consistency of Weakly-Ordered Architectures Details |
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Dharmendra S. Modha |
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Practical Near-Data Processing for In-Memory Analytics Frameworks Mingyu Gao, Grant Ayers, Christos Kozyrakis |
Practical Near-Data Processing for In-Memory Analytics Frameworks Details |
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Energy-Efficient Hybrid DRAM/NVM Main Memory Ahmad Hassan, Hans Vandierendonck, Dimitrios S. Nikolopoulos |
Energy-Efficient Hybrid DRAM/NVM Main Memory Details |
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Polyhedral Optimizations of Explicitly Parallel Programs Prasanth Chatarasi, Jun Shirako, Vivek Sarkar |
Polyhedral Optimizations of Explicitly Parallel Programs Details |
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ALEA: Fine-Grain Energy Profiling with Basic Block Sampling Lev Mukhanov, Dimitrios S. Nikolopoulos, Bronis R. de Supinski |
ALEA: Fine-Grain Energy Profiling with Basic Block Sampling Details |
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Unified Identification of Multiple Forms of Parallelism in Embedded Applications Miguel Angel Aguilar, Rainer Leupers |
Unified Identification of Multiple Forms of Parallelism in Embedded Applications Details |
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Extending Polyhedral Model for Analysis and Transformation of OpenMP Programs Prasanth Chatarasi, Vivek Sarkar |
Extending Polyhedral Model for Analysis and Transformation of OpenMP Programs Details |
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An Optimization of Resource Arrangement for Network-on-Chip using Genetic Algorithm Daichi Murakami, Kei Hiraki |
An Optimization of Resource Arrangement for Network-on-Chip using Genetic Algorithm Details |
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An Algorithmic Approach to Communication Reduction in Parallel Graph Algorithms Harshvardhan, Adam Fidel, Nancy M. Amato, Lawrence Rauchwerger |
An Algorithmic Approach to Communication Reduction in Parallel Graph Algorithms Details |
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Exploiting Staleness for Approximating Loads on CMPs Prasanna Venkatesh Rengasamy, Anand Sivasubramaniam, Mahmut T. Kandemir, Chita R. Das |
Exploiting Staleness for Approximating Loads on CMPs Details |
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Compiling and Optimizing Java 8 Programs for GPU Execution Kazuaki Ishizaki, Akihiro Hayashi, Gita Koblents, Vivek Sarkar |
Compiling and Optimizing Java 8 Programs for GPU Execution Details |
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Exploiting Program Semantics to Place Data in Hybrid Memory Wei Wei, Dejun Jiang, Sally A. McKee, Jin Xiong, Mingyu Chen |
Exploiting Program Semantics to Place Data in Hybrid Memory Details |
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NVMMU: A Non-volatile Memory Management Unit for Heterogeneous GPU-SSD Architectures Jie Zhang, David Donofrio, John Shalf, Mahmut T. Kandemir, Myoungsoo Jung |
NVMMU: A Non-volatile Memory Management Unit for Heterogeneous GPU-SSD Architectures Details |
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TSXProf: Profiling Hardware Transactions Yujie Liu, Justin Gottschlich, Gilles Pokam, Michael F. Spear |
TSXProf: Profiling Hardware Transactions Details |
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Fine Grain Cache Partitioning Using Per-Instruction Working Blocks Jason Jong Kyu Park, Yongjun Park, Scott A. Mahlke |
Fine Grain Cache Partitioning Using Per-Instruction Working Blocks Details |
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Throttling Automatic Vectorization: When Less is More Vasileios Porpodas, Timothy M. Jones |
Throttling Automatic Vectorization: When Less is More Details |
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George Kurian, Qingchuan Shi, Srinivas Devadas, Omer Khan |
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A Software-Managed Approach to Die-Stacked DRAM Mark Oskin, Gabriel H. Loh |
A Software-Managed Approach to Die-Stacked DRAM Details |
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Storage Consolidation on SSDs: Not Always a Panacea, but Can We Ease the Pain? Narges Shahidi, Anand Sivasubramanian, Mahmut T. Kandemir, Chita R. Das |
Storage Consolidation on SSDs: Not Always a Panacea, but Can We Ease the Pain? Details |
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PENCIL: A Platform-Neutral Compute Intermediate Language for Accelerator Programming Riyadh Baghdadi, Ulysse Beaugnon, Albert Cohen, Tobias Grosser, Michael Kruse, Chandan Reddy, Sven Verdoolaege, Adam Betts, Alastair F. Donaldson, Jeroen Ketema, Javed Absar, Sven van Haastregt, Alexey Kravets, Anton Lokhmotov, Robert David, Elnar Hajiyev |
PENCIL: A Platform-Neutral Compute Intermediate Language for Accelerator Programming Details |
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Tardis: Time Traveling Coherence Algorithm for Distributed Shared Memory Xiangyao Yu, Srinivas Devadas |
Tardis: Time Traveling Coherence Algorithm for Distributed Shared Memory Details |
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Vector Parallelism in JavaScript: Language and Compiler Support for SIMD Ivan Jibaja, Peter Jensen, Ningxin Hu, Mohammad R. Haghighat, John McCutchan, Dan Gohman, Stephen M. Blackburn, Kathryn S. McKinley |
Vector Parallelism in JavaScript: Language and Compiler Support for SIMD Details |
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Runtime Value Numbering: A Profiling Technique to Pinpoint Redundant Computations Shasha Wen, Xu Liu, Milind Chabbi |
Runtime Value Numbering: A Profiling Technique to Pinpoint Redundant Computations Details |
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AREP: Adaptive Resource Efficient Prefetching for Maximizing Multicore Performance Muneeb Khan, Michael A. Laurenzano, Jason Mars, Erik Hagersten, David Black-Schaffer |
AREP: Adaptive Resource Efficient Prefetching for Maximizing Multicore Performance Details |
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Integrating 3D Resistive Memory Cache into GPGPU for Energy-Efficient Data Processing Jie Zhang, David Donofrio, John Shalf, Myoungsoo Jung |
Integrating 3D Resistive Memory Cache into GPGPU for Energy-Efficient Data Processing Details |
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Evaluating the Cost of Atomic Operations on Modern Architectures Hermann Schweizer, Maciej Besta, Torsten Hoefler |
Evaluating the Cost of Atomic Operations on Modern Architectures Details |
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Cosmology and Computers: HACCing the Universe Salman Habib |
Cosmology and Computers: HACCing the Universe Details |
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Decoupled Direct Memory Access: Isolating CPU and IO Traffic by Leveraging a Dual-Data-Port DRAM Donghyuk Lee, Lavanya Subramanian, Rachata Ausavarungnirun, Jongmoo Choi, Onur Mutlu |
Decoupled Direct Memory Access: Isolating CPU and IO Traffic by Leveraging a Dual-Data-Port DRAM Details |
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Scalable SIMD-Efficient Graph Processing on GPUs Farzad Khorasani, Rajiv Gupta, Laxmi N. Bhuyan |
Scalable SIMD-Efficient Graph Processing on GPUs Details |
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DVFS-Aware Consolidation for Energy-Efficient Clouds Patricia Arroba, José Manuel Moya, José L. Ayala, Rajkumar Buyya |
DVFS-Aware Consolidation for Energy-Efficient Clouds Details |
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Orchestrating Multiple Data-Parallel Kernels on Multiple Devices Janghaeng Lee, Mehrzad Samadi, Scott A. Mahlke |
Orchestrating Multiple Data-Parallel Kernels on Multiple Devices Details |
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Scalable Task Scheduling and Synchronization Using Hierarchical Effects Stephen T. Heumann, Alexandros Tzannes, Vikram S. Adve |
Scalable Task Scheduling and Synchronization Using Hierarchical Effects Details |
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Communication Avoiding Algorithms: Analysis and Code Generation for Parallel Systems Karthik Murthy, John M. Mellor-Crummey |
Communication Avoiding Algorithms: Analysis and Code Generation for Parallel Systems Details |
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Joo Hwan Lee, Jaewoong Sim, Hyesoon Kim |
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Compiler Assisted Load Balancing on Large Clusters Vinit Deodhar, Hrushit Parikh, Ada Gavrilovska, Santosh Pande |
Compiler Assisted Load Balancing on Large Clusters Details |
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Stadium Hashing: Scalable and Flexible Hashing on GPUs Farzad Khorasani, Mehmet E. Belviranli, Rajiv Gupta, Laxmi N. Bhuyan |
Stadium Hashing: Scalable and Flexible Hashing on GPUs Details |
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