From high-level deep neural models to FPGAs

Article Details
Title:	From high-level deep neural models to FPGAs
Article URLs:	https://doi.org/10.1109/MICRO.2016.7783720 http://doi.ieeecomputersociety.org/10.1109/MICRO.2016.7783720 http://dl.acm.org/citation.cfm?id=3195659
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Authors:	Hardik Sharma	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
	Jongse Park	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
	Divya Mahajan	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
	Emmanuel Amaro	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
	Joon Kyung Kim	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
	Chenkai Shao	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
	Asit Mishra	Intel Corporation
	Hadi Esmaeilzadeh	Alternative Computing Technologies (ACT) Lab Georgia Institute of Technology, School of Computer Science
Sharing:	Research produced artifacts
Verification:	Authors have verified information
Artifact Evaluation Badge:	none
Artifact URLs:	http://act-lab.org/artifacts/dnnweaver
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NSF Award Numbers:	1553192, 1526211
DBLP Key:	conf/micro/SharmaPMAKSME16
Author Comments:

IEEE/ACM International Symposium on Microarchitecture, MICRO 2016