| Title: |
Logic characterization vehicle design reflection via layout rewiring |
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| Authors: |
Phillip Fynan |
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Carnegie Mellon University, Advanced Chip Testing Laboratory, Department of Electrical and Computer Engineering
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| Zeye Liu |
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Carnegie Mellon University, Advanced Chip Testing Laboratory, Department of Electrical and Computer Engineering
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| Benjamin Niewenhuis |
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Carnegie Mellon University, Advanced Chip Testing Laboratory, Department of Electrical and Computer Engineering
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| Soumya Mittal |
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Carnegie Mellon University, Advanced Chip Testing Laboratory, Department of Electrical and Computer Engineering
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| Marcin Strajwas |
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| R. D. (Shawn) Blanton |
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Carnegie Mellon University, Advanced Chip Testing Laboratory, Department of Electrical and Computer Engineering
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| Sharing: |
Unknown
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| Verification: |
Authors have
not verified
information
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| Artifact Evaluation Badge: |
none
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| DBLP Key: |
conf/itc/FynanLNMSB16
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| Author Comments: |
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