| Title: |
Joint loop mapping and data placement for coarse-grained reconfigurable architecture with multi-bank memory |
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| Authors: |
Shouyi Yin |
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Tsinghua University, Institute of Microelectronics
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| Xianqing Yao |
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Tsinghua University, Institute of Microelectronics
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| Tianyi Lu |
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Tsinghua University, Institute of Microelectronics
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| Leibo Liu |
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Tsinghua University, Institute of Microelectronics
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| Shaojun Wei |
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Tsinghua University, Institute of Microelectronics
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| Sharing: |
Unknown
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| Verification: |
Authors have
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| Artifact Evaluation Badge: |
none
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| DBLP Key: |
conf/iccad/YinYLLW16
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| Author Comments: |
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