DUO: Exposing On-Chip Redundancy to Rank-Level ECC for High Reliability

Article Details
Title:	DUO: Exposing On-Chip Redundancy to Rank-Level ECC for High Reliability
Article URLs:	https://doi.org/10.1109/HPCA.2018.00064 http://doi.ieeecomputersociety.org/10.1109/HPCA.2018.00064
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Authors:	Seong-Lyong Gong	UT Austin
	Jungrae Kim	Microsoft
	Sangkug Lym	UT Austin
	Michael B. Sullivan	NVIDIA
	Howard David	Huawei
	Mattan Erez	UT Austin
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DBLP Key:	conf/hpca/GongKLSDE18
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IEEE International Symposium on High Performance Computer Architecture, HPCA 2018