| Article Details | ||
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| Title: | Age-aware Logic and Memory Co-Placement for RRAM-FPGAs | |
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| Authors: | Yuan Xue |
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| Chengmo Yang |
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| Jingtong Hu |
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| Sharing: | Unknown | |
| Verification: | Authors have not verified information | |
| Artifact Evaluation Badge: | none | |
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| NSF Award Numbers: | 1527464, 1527506 | |
| DBLP Key: | conf/dac/XueYH17 | |
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