Design Automation Conference, DAC 2017


Article Details
Title: Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits
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Authors: Mengshuo Wang
  • Fudan University, Microelectronics Department, State Key Lab of ASIC & System
Fan Yang
  • Fudan University, Microelectronics Department, State Key Lab of ASIC & System
Changhao Yan
  • Fudan University, Microelectronics Department, State Key Lab of ASIC & System
Xuan Zeng
  • Fudan University, Microelectronics Department, State Key Lab of ASIC & System
Xiangdong Hu
  • Shanghai High Performance Integrated Circuit Design Center
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DBLP Key: conf/dac/WangYYZH17
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