Design Automation Conference, DAC 2017


Article Details
Title: A Clock Skewing Strategy to Reduce Power and Area of ASIC Circuits
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Authors: Niranjan Kulkarni
  • Arizona State University, School of Computing, Informatics and Decision Systems Engineering
Aykut Dengi
  • Arizona State University, School of Computing, Informatics and Decision Systems Engineering
Sarma B. K. Vrudhula
  • Arizona State University, School of Computing, Informatics and Decision Systems Engineering
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NSF Award Numbers: 1237856, 028151
DBLP Key: conf/dac/KulkarniDV17
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