| Title: |
Graph-Based Logic Bit Slicing for Datapath-Aware Placement |
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| Authors: |
Chau-Chin Huang |
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National Taiwan University, Graduate Institute of Electronics Engineering
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| Bo-Qiao Lin |
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National Taiwan University, Graduate Institute of Electronics Engineering
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| Hsin-Ying Lee |
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National Taiwan University, Graduate Institute of Electronics Engineering
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| Yao-Wen Chang |
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National Taiwan University, Graduate Institute of Electronics Engineering
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| Kuo-Sheng Wu |
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| Jun-Zhi Yang |
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| Sharing: |
Unknown
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Authors have
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none
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| DBLP Key: |
conf/dac/HuangLLCWY17
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