Optimal Circuits for Parallel Bit Reversal

Article Details
Title:	Optimal Circuits for Parallel Bit Reversal
Article URLs:	https://doi.org/10.1145/3061639.3062295
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Authors:	Ren Chen	University of Southern California, Ming Hsieh Department of Electrical Engineering,
Authors:	Viktor K. Prasanna	University of Southern California
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Artifact URLs:	http://www-scf.usc.edu/~renchen/
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DBLP Key:	conf/dac/ChenP17
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Design Automation Conference, DAC 2017