| Title: |
DRUT: An Efficient Turbo Boost Solution via Load Balancing in Decoupled Look-Ahead Architecture |
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| Authors: |
Raj Parihar |
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Cadence Design Systems, Tensilica R&D
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Cadence Design Systems, IP Group
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| Michael C. Huang |
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University of Rochester, Dept. of Eletrical & Computer Engineering
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| Sharing: |
Unknown
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Authors have
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none
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| NSF Award Numbers: |
0747324
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| DBLP Key: |
conf/IEEEpact/PariharH17
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| Author Comments: |
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