| Title/Authors | Title | Research Artifacts
[?] A research
artifact is any by-product of a research project that is not
directly included in the published research paper. In Computer
Science research this is often source code and data sets, but
it could also be media, documentation, inputs to proof
assistants, shell-scripts to run experiments, etc.
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AxGames: Towards Crowdsourcing Quality Target Determination in Approximate Computing Jongse Park, Emmanuel Amaro, Divya Mahajan, Bradley Thwaites, Hadi Esmaeilzadeh |
AxGames: Towards Crowdsourcing Quality Target Determination in Approximate Computing Details |
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Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality Emmett Witchel |
Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality Details |
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Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compilers Niranjan Hasabnis, R. Sekar |
Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compilers Details |
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Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers Amro Awad, Pratyusa K. Manadhata, Stuart Haber, Yan Solihin, William Horne |
Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers Details |
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TaxDC: A Taxonomy of Non-Deterministic Concurrency Bugs in Datacenter Distributed Systems Tanakorn Leesatapornwongsa, Jeffrey F. Lukman, Shan Lu, Haryadi S. Gunawi |
TaxDC: A Taxonomy of Non-Deterministic Concurrency Bugs in Datacenter Distributed Systems Details |
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WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication Sergi Abadal, Albert Cabellos-Aparicio, Eduard Alarcón, Josep Torrellas |
WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication Details |
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High-Performance Transactions for Persistent Memories Aasheesh Kolli, Steven Pelley, Ali G. Saidi, Peter M. Chen, Thomas F. Wenisch |
High-Performance Transactions for Persistent Memories Details |
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Scalable Kernel TCP Design and Implementation for Short-Lived Connections Xiaofeng Lin, Yu Chen, Xiaodong Li, Junjie Mao, Jiaquan He, Wei Xu, Yuanchun Shi |
Scalable Kernel TCP Design and Implementation for Short-Lived Connections Details |
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Yossi Kuperman, Eyal Moscovici, Joel Nider, Razya Ladelsky, Abel Gordon, Dan Tsafrir |
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DySel: Lightweight Dynamic Selection for Kernel-based Data-parallel Programming Model Li-Wen Chang, Hee-Seok Kim, Wen-mei W. Hwu |
DySel: Lightweight Dynamic Selection for Kernel-based Data-parallel Programming Model Details |
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Generating Configurable Hardware from Parallel Patterns Raghu Prabhakar, David Koeplinger, Kevin J. Brown, HyoukJoong Lee, Christopher De Sa, Christos Kozyrakis, Kunle Olukotun |
Generating Configurable Hardware from Parallel Patterns Details |
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Martin Maas, Krste Asanovic, Tim Harris, John Kubiatowicz |
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Whirlpool: Improving Dynamic Cache Management with Static Data Classification Anurag Mukkara, Nathan Beckmann, Daniel Sánchez |
Whirlpool: Improving Dynamic Cache Management with Static Data Classification Details |
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Phitchaya Mangpo Phothilimthana, Aditya Thakur, Rastislav Bodík, Dinakar Dhurjati |
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Dirigent: Enforcing QoS for Latency-Critical Tasks on Shared Multicore Systems Haishan Zhu, Mattan Erez |
Dirigent: Enforcing QoS for Latency-Critical Tasks on Shared Multicore Systems Details |
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Programming Uncertain <T>jhings Kathryn S. McKinley |
Programming Uncertain <T>jhings Details |
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An Energy-interference-free Hardware-Software Debugger for Intermittent Energy-harvesting Systems Alexei Colin, Graham Harvey, Brandon Lucia, Alanson P. Sample |
An Energy-interference-free Hardware-Software Debugger for Intermittent Energy-harvesting Systems Details |
Author Comments:
Please contact authors for obtaining a hardware EDB board.
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RID: Finding Reference Count Bugs with Inconsistent Path Pair Checking Junjie Mao, Yu Chen, Qixue Xiao, Yuanchun Shi |
RID: Finding Reference Count Bugs with Inconsistent Path Pair Checking Details |
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SpaceJMP: Programming with Multiple Virtual Address Spaces Izzat El Hajj, Alexander Merritt, Gerd Zellweger, Dejan S. Milojicic, Reto Achermann, Paolo Faraboschi, Wen-mei W. Hwu, Timothy Roscoe, Karsten Schwan |
SpaceJMP: Programming with Multiple Virtual Address Spaces Details |
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NVWAL: Exploiting NVRAM in Write-Ahead Logging Wook-Hee Kim, Jinwoong Kim, Woongki Baek, Beomseok Nam, Youjip Won |
NVWAL: Exploiting NVRAM in Write-Ahead Logging Details |
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Quan Chen, Hailong Yang, Jason Mars, Lingjia Tang |
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HIPStR: Heterogeneous-ISA Program State Relocation Ashish Venkat, Sriskanda Shamasunder, Hovav Shacham, Dean M. Tullsen |
HIPStR: Heterogeneous-ISA Program State Relocation Details |
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Failure-Atomic Persistent Memory Updates via JUSTDO Logging Joseph Izraelevitz, Terence Kelly, Aasheesh Kolli |
Failure-Atomic Persistent Memory Updates via JUSTDO Logging Details |
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RAPID Programming of Pattern-Recognition Processors Kevin Angstadt, Westley Weimer, Kevin Skadron |
RAPID Programming of Pattern-Recognition Processors Details |
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CASPAR: Breaking Serialization in Lock-Free Multicore Synchronization Tanmay Gangwani, Adam Morrison, Josep Torrellas |
CASPAR: Breaking Serialization in Lock-Free Multicore Synchronization Details |
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TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory Tong Zhang, Dongyoon Lee, Changhee Jung |
TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory Details |
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Architecture-Adaptive Code Variant Tuning Saurav Muralidharan, Amit Roy, Mary W. Hall, Michael Garland, Piyush Rai |
Architecture-Adaptive Code Variant Tuning Details |
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How to Build Static Checking Systems Using Orders of Magnitude Less Code Fraser Brown, Andres Nötzli, Dawson R. Engler |
How to Build Static Checking Systems Using Orders of Magnitude Less Code Details |
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ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna Das, Matthew Hicks, Yossi Oren, Todd M. Austin |
ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks Details |
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M3: A Hardware/Operating-System Co-Design to Tame Heterogeneous Manycores Nils Asmussen, Marcus Völp, Benedikt Nöthen, Hermann Härtig, Gerhard P. Fettweis |
M3: A Hardware/Operating-System Co-Design to Tame Heterogeneous Manycores Details |
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Myeongjae Jeon, Yuxiong He, Hwanju Kim, Sameh Elnikety, Scott Rixner, Alan L. Cox |
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True IOMMU Protection from DMA Attacks: When Copy is Faster than Zero Copy Alex Markuze, Adam Morrison, Dan Tsafrir |
True IOMMU Protection from DMA Attacks: When Copy is Faster than Zero Copy Details |
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Maximizing Performance Under a Power Cap: A Comparison of Hardware, Software, and Hybrid Techniques Huazhe Zhang, Henry Hoffmann |
Maximizing Performance Under a Power Cap: A Comparison of Hardware, Software, and Hybrid Techniques Details |
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Prudent Memory Reclamation in Procrastination-Based Synchronization Aravinda Prasad, K. Gopinath |
Prudent Memory Reclamation in Procrastination-Based Synchronization Details |
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CloudSeer: Workflow Monitoring of Cloud Infrastructures via Interleaved Logs Xiao Yu, Pallavi Joshi, Jianwu Xu, Guoliang Jin, Hui Zhang, Guofei Jiang |
CloudSeer: Workflow Monitoring of Cloud Infrastructures via Interleaved Logs Details |
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A DNA-Based Archival Storage System James Bornholt, Randolph Lopez, Douglas M. Carmean, Luis Ceze, Georg Seelig, Karin Strauss |
A DNA-Based Archival Storage System Details |
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CoGENT: Verifying High-Assurance File System Implementations Sidney Amani, Alex Hixon, Zilin Chen, Christine Rizkallah, Peter Chubb, Liam O'Connor, Joel Beeren, Yutaka Nagashima, Japheth Lim, Thomas Sewell, Joseph Tuong, Gabriele Keller, Toby C. Murray, Gerwin Klein, Gernot Heiser |
CoGENT: Verifying High-Assurance File System Implementations Details |
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CSR: Core Surprise Removal in Commodity Operating Systems Noam Shalev, Eran Harpaz, Hagar Porat, Idit Keidar, Yaron Weinsberg |
CSR: Core Surprise Removal in Commodity Operating Systems Details |
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Synopsis of the ASPLOS '16 Wild and Crazy Ideas (WACI) Invited-Speakers Session Dan Tsafrir |
Synopsis of the ASPLOS '16 Wild and Crazy Ideas (WACI) Invited-Speakers Session Details |
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PIFT: Predictive Information-Flow Tracking Man-Ki Yoon, Negin Salajegheh, Yin Chen, Mihai Christodorescu |
PIFT: Predictive Information-Flow Tracking Details |
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Analyzing Behavior Specialized Acceleration Tony Nowatzki, Karthikeyan Sankaralingam |
Analyzing Behavior Specialized Acceleration Details |
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COATCheck: Verifying Memory Ordering at the Hardware-OS Interface Daniel Lustig, Geet Sethi, Margaret Martonosi, Abhishek Bhattacharjee |
COATCheck: Verifying Memory Ordering at the Hardware-OS Interface Details |
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OpenPiton: An Open Source Manycore Research Framework Jonathan Balkind, Michael McKeown, Yaosheng Fu, Tri Minh Nguyen, Yanqi Zhou, Alexey Lavrov, Mohammad Shahrad, Adi Fuchs, Samuel Payne, Xiaohua Liang, Matthew Matl, David Wentzlaff |
OpenPiton: An Open Source Manycore Research Framework Details |
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The Computational Sprinting Game Songchun Fan, Seyed Majid Zahedi, Benjamin C. Lee |
The Computational Sprinting Game Details |
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Interference Management for Distributed Parallel Applications in Consolidated Clusters Jaeung Han, Seungheun Jeon, Young-ri Choi, Jaehyuk Huh |
Interference Management for Distributed Parallel Applications in Consolidated Clusters Details |
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Daniyal Liaqat, Silviu Jingoi, Eyal de Lara, Ashvin Goel, Wilson To, Kevin Lee, Italo De Moraes Garcia, Manuel Saldaña |
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Sego: Pervasive Trusted Metadata for Efficiently Verified Untrusted System Services Youngjin Kwon, Alan M. Dunn, Michael Z. Lee, Owen S. Hofmann, Yuanzhong Xu, Emmett Witchel |
Sego: Pervasive Trusted Metadata for Efficiently Verified Untrusted System Services Details |
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Xiaodong Wang, José F. Martínez |
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High Performance Packet Processing with FlexNIC Antoine Kaufmann, Simon Peter, Naveen Kr. Sharma, Thomas E. Anderson, Arvind Krishnamurthy |
High Performance Packet Processing with FlexNIC Details |
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R. Stanley Williams |
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memif: Towards Programming Heterogeneous Memory Asynchronously Felix Xiaozhu Lin, Xu Liu |
memif: Towards Programming Heterogeneous Memory Asynchronously Details |
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Proactive Control of Approximate Programs Xin Sui, Andrew Lenharth, Donald S. Fussell, Keshav Pingali |
Proactive Control of Approximate Programs Details |
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HCloud: Resource-Efficient Provisioning in Shared Cloud Systems Christina Delimitrou, Christos Kozyrakis |
HCloud: Resource-Efficient Provisioning in Shared Cloud Systems Details |
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High-Density Image Storage Using Approximate Memory Cells Qing Guo, Karin Strauss, Luis Ceze, Henrique S. Malvar |
High-Density Image Storage Using Approximate Memory Cells Details |
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Specifying and Checking File System Crash-Consistency Models James Bornholt, Antoine Kaufmann, Jialin Li, Arvind Krishnamurthy, Emina Torlak, Xi Wang |
Specifying and Checking File System Crash-Consistency Models Details |
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LDX: Causality Inference by Lightweight Dual Execution Yonghwi Kwon, Dohyeong Kim, William N. Sumner, Kyungtae Kim, Brendan Saltaformaggio, Xiangyu Zhang, Dongyan Xu |
LDX: Causality Inference by Lightweight Dual Execution Details |
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ProteusTM: Abstraction Meets Performance in Transactional Memory Diego Didona, Nuno Diegues, Anne-Marie Kermarrec, Rachid Guerraoui, Ricardo Neves, Paolo Romano |
ProteusTM: Abstraction Meets Performance in Transactional Memory Details |
Author Comments:
When using this work, please cite accordingly: "ProteusTM: Abstraction Meets Performance in Transactional Memory", Diego Didona, Nuno Diegues, Rachid Guerraoui, Anne-Marie Kermarrec, Ricardo Neves and Paolo Romano, in Proceedings of the 21st International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2016.
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