IEEE/ACM Intl. Conf. on Parallel Architectures and Compilation Techniques, PACT 2018


Title/Authors Title Research Artifacts
[?] A research artifact is any by-product of a research project that is not directly included in the published research paper. In Computer Science research this is often source code and data sets, but it could also be media, documentation, inputs to proof assistants, shell-scripts to run experiments, etc.
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Near-side prefetch throttling: adaptive prefetching for high-performance many-core processors

Wim Heirman, Kristof Du Bois, Yves Vandriessche, Stijn Eyerman, Ibrahim Hur

Near-side prefetch throttling: adaptive prefetching for high-performance many-core processors

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Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign

Tony Nowatzki, Newsha Ardalani, Karthikeyan Sankaralingam, Jian Weng

Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign

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Performance extraction and suitability analysis of multi- and many-core architectures for next generation sequencing secondary analysis

Sanchit Misra, Tony C. Pan, Kanak Mahadik, George Powley, Priya N. Vaidya, Md. Vasimuddin, Srinivas Aluru

Performance extraction and suitability analysis of multi- and many-core architectures for next generation sequencing secondary analysis

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Data motifs: a lens towards fully understanding big data and AI workloads

Wanling Gao, Jianfeng Zhan, Lei Wang, Chunjie Luo, Daoyi Zheng, Fei Tang, Biwei Xie, Chen Zheng, Xu Wen, Xiwen He, Hainan Ye, Rui Ren

Data motifs: a lens towards fully understanding big data and AI workloads

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EAR: ECC-aided refresh reduction through 2-D zero compression

Jeongkyu Hong, Hyeonggyu Kim, Soontae Kim

EAR: ECC-aided refresh reduction through 2-D zero compression

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E-PUR: an energy-efficient processing unit for recurrent neural networks

Franyell Silfa, Gem Dot, Jose-Maria Arnau, Antonio González

E-PUR: an energy-efficient processing unit for recurrent neural networks

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Compiler assisted coalescing

Sooraj Puthoor, Mikko H. Lipasti

Compiler assisted coalescing

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Towards concurrency race debugging: an integrated approach for constraint solving and dynamic slicing

Long Zheng, Xiaofei Liao, Hai Jin, Bingsheng He, Jingling Xue, Haikun Liu

Towards concurrency race debugging: an integrated approach for constraint solving and dynamic slicing

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Cost effective speculation with the omnipredictor

Arthur Perais, André Seznec

Cost effective speculation with the omnipredictor

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3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions

Sukhan Lee, Kiwon Lee, Min Chul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, Nam Sung Kim

3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions

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DART: distributed adaptive radix tree for efficient affix-based keyword search on HPC systems

Wei Zhang, Houjun Tang, Suren Byna, Yong Chen

DART: distributed adaptive radix tree for efficient affix-based keyword search on HPC systems

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Optimizing remote data transfers in X10

Arun Thangamani, V. Krishna Nandivada

Optimizing remote data transfers in X10

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Graphphi: efficient parallel graph processing on emerging throughput-oriented architectures

Zhen Peng, Alexander Powell, Bo Wu, Tekin Bicer, Bin Ren

Graphphi: efficient parallel graph processing on emerging throughput-oriented architectures

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Massively parallel skyline computation for processing-in-memory architectures

Vasileios Zois, Divya Gupta, Vassilis J. Tsotras, Walid A. Najjar, Jean-François Roy

Massively parallel skyline computation for processing-in-memory architectures

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MemoDyn: exploiting weakly consistent data structures for dynamic parallel memoization

Prakash Prabhu, Stephen R. Beard, Sotiris Apostolakis, Ayal Zaks, David I. August

MemoDyn: exploiting weakly consistent data structures for dynamic parallel memoization

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Transactional pre-abort handlers in hardware transactional memory

Sunjae Park, Christopher J. Hughes, Milos Prvulovic

Transactional pre-abort handlers in hardware transactional memory

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Hypart: a hybrid technique for practical memory bandwidth partitioning on commodity servers

Jinsu Park, Seongbeom Park, Myeonggyun Han, Jihoon Hyun, Woongki Baek

Hypart: a hybrid technique for practical memory bandwidth partitioning on commodity servers

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Revealing parallel scans and reductions in recurrences through function reconstruction

Peng Jiang, Linchuan Chen, Gagan Agrawal

Revealing parallel scans and reductions in recurrences through function reconstruction

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Stencil codes on a vector length agnostic architecture

Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó

Stencil codes on a vector length agnostic architecture

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A portable, automatic data qantizer for deep neural networks

Young H. Oh, Quan Quan, Daeyeon Kim, Seonghak Kim, Jun Heo, Sungjun Jung, Jaeyoung Jang, Jae W. Lee

A portable, automatic data qantizer for deep neural networks

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An efficient graph accelerator with parallel data conflict management

Pengcheng Yao, Long Zheng, Xiaofei Liao, Hai Jin, Bingsheng He

An efficient graph accelerator with parallel data conflict management

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Biased reference counting: minimizing atomic operations in garbage collection

Jiho Choi, Thomas Shull, Josep Torrellas

Biased reference counting: minimizing atomic operations in garbage collection

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Log(graph): a near-optimal high-performance graph representation

Maciej Besta, Dimitri Stanojevic, Tijana Zivic, Jagpreet Singh, Maurice Hoerold, Torsten Hoefler

Log(graph): a near-optimal high-performance graph representation

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Architectural support for convolutional neural networks on modern CPUs

Animesh Jain, Michael A. Laurenzano, Gilles A. Pokam, Jason Mars, Lingjia Tang

Architectural support for convolutional neural networks on modern CPUs

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ComP-net: command processor networking for efficient intra-kernel communications on GPUs

Michael LeBeane, Khaled Hamidouche, Brad Benton, Maurício Breternitz, Steven K. Reinhardt, Lizy K. John

ComP-net: command processor networking for efficient intra-kernel communications on GPUs

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Maximizing system utilization via parallelism management for co-located parallel applications

Younghyun Cho, Camilo A. Celis Guzman, Bernhard Egger

Maximizing system utilization via parallelism management for co-located parallel applications

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Mage: online and interference-aware scheduling for multi-scale heterogeneous systems

Francisco Romero, Christina Delimitrou

Mage: online and interference-aware scheduling for multi-scale heterogeneous systems

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Synergistic cache layout for reuse and compression

Biswabandan Panda, André Seznec

Synergistic cache layout for reuse and compression

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VW-SLP: auto-vectorization with adaptive vector width

Vasileios Porpodas, Rodrigo C. O. Rocha, Luís F. W. Góes

VW-SLP: auto-vectorization with adaptive vector width

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Atributed consistent hashing for heterogeneous storage systems

Jiang Zhou, Yong Chen, Weiping Wang

Atributed consistent hashing for heterogeneous storage systems

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In-DRAM near-data approximate acceleration for GPUs

Amir Yazdanbakhsh, Choungki Song, Jacob Sacks, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh, Nam Sung Kim

In-DRAM near-data approximate acceleration for GPUs

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On-the-fly workload partitioning for integrated CPU/GPU architectures

Younghyun Cho, Florian Negele, Seohong Park, Bernhard Egger, Thomas R. Gross

On-the-fly workload partitioning for integrated CPU/GPU architectures

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GMOD: a dynamic GPU memory overflow detector

Bang Di, Jianhua Sun, Dong Li, Hao Chen, Zhe Quan

GMOD: a dynamic GPU memory overflow detector

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Cost-driven thread coarsening for GPU kernels

Prithayan Barua, Jun Shirako, Vivek Sarkar

Cost-driven thread coarsening for GPU kernels

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Cimple: instruction and memory level parallelism: a DSL for uncovering ILP and MLP

Vladimir Kiriansky, Haoran Xu, Martin Rinard, Saman P. Amarasinghe

Cimple: instruction and memory level parallelism: a DSL for uncovering ILP and MLP

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Automatic annotation of tasks in structured code

Pedro Ramos, Gleison Souza Diniz Mendonca, Divino Soares, Guido Araújo, Fernando Magno Quintão Pereira

Automatic annotation of tasks in structured code

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