| Title: |
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms |
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| Authors: |
Donghyuk Lee |
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Carnegie Mellon University
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NVIDIA
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| Samira Manabi Khan |
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| Lavanya Subramanian |
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Carnegie Mellon University
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| Saugata Ghose |
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Carnegie Mellon University
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| Rachata Ausavarungnirun |
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Carnegie Mellon University
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| Gennady Pekhimenko |
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Carnegie Mellon University
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Microsoft Research
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| Vivek Seshadri |
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Microsoft Research
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Carnegie Mellon University
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| Onur Mutlu |
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Carnegie Mellon University
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ETH Zürich
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| Sharing: |
Unknown
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| Verification: |
Authors have
not verified
information
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| Artifact Evaluation Badge: |
none
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| DBLP Key: |
conf/sigmetrics/LeeKSGAPSM17
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| Author Comments: |
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