IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2016


Article Details
Title: Complete, High-Assurance Determination of Loop Bounds and Infeasible Paths for WCET Analysis
Article URLs:
Alternative Article URLs:
Authors: Thomas Sewell
  • Data61
  • UNSW
Felix Kam
  • Data61
  • UNSW
Gernot Heiser
  • Data61
  • UNSW
Sharing: Unknown
Verification: Authors have not verified information
Artifact Evaluation Badge: none
Artifact URLs:
Artifact Correspondence Email Addresses:
NSF Award Numbers:
DBLP Key: conf/rtas/SewellKH16
Author Comments:

Discuss this paper and its artifacts below