IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2016


Article Details
Title: From Stateflow Simulation to Verified Implementation: A Verification Approach and A Real-Time Train Controller Design
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Authors: Yu Jiang
  • University of Illinois at Urbana-Champaign, Department of Computer Science
  • Tsinghua University, School of Software
Yixiao Yang
  • Tsinghua University, School of Software
Han Liu
  • Tsinghua University, School of Software
Hui Kong
  • Institute of Science and Technology, Austria
Ming Gu
  • Tsinghua University, School of Software
Jia-Guang Sun
  • Tsinghua University, School of Software
Lui Sha
  • University of Illinois at Urbana-Champaign, Department of Computer Science
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NSF Award Numbers: 1330077, 1329886, 1545002
DBLP Key: conf/rtas/JiangYLKGSS16
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