Accelerating Graph and Machine Learning Workloads Using a Shared Memory Multicore Architecture with Auxiliary Support for In-hardware Explicit Messaging

Article Details
Title:	Accelerating Graph and Machine Learning Workloads Using a Shared Memory Multicore Architecture with Auxiliary Support for In-hardware Explicit Messaging
Article URLs:	https://doi.org/10.1109/IPDPS.2017.116 http://doi.ieeecomputersociety.org/10.1109/IPDPS.2017.116
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Authors:	Halit Dogan	University of Connecticut
	Farrukh Hijaz	University of Connecticut
	Masab Ahmad	University of Connecticut
	Brian Kahne	NXP Semiconductors
	Peter Wilson	NXP Semiconductors
	Omer Khan	University of Connecticut
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NSF Award Numbers:	1452327
DBLP Key:	conf/ipps/DoganHAKWK17
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IEEE Intl. Parallel and Distributed Processing Symposium, IPDPS 2017