Counterexample-Guided Quantifier Instantiation for Synthesis in SMT

Article Details
Title:	Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
Article URLs:	https://doi.org/10.1007/978-3-319-21668-3_12
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Authors:	Andrew Reynolds	Ecole Polytechnique Federale de Lausanne
	Morgan Deters	New York University, Department of Computer Science
	Viktor Kuncak	Ecole Polytechnique Federale de Lausanne
	Cesare Tinelli	University of Iowa, Department of Computer Science
	Clark W. Barrett	New York University, Department of Computer Science
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Artifact Evaluation Badge:	Artifacts for some papers are reviewed by an artifact evaluation, reproducibility, or similarly named committee. This is one such paper that passed review. awarded
Artifact URLs:	http://lara.epfl.ch/w/cvc4-synthesis
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DBLP Key:	conf/cav/ReynoldsDKTB15
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Computer Aided Verification, CAV 2015