Repro. Qlty-Effic. Sys. Tourn. on Co-designing Pareto-effic. Deep Learning, ReQuEST 2018

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Title: Leveraging the VTA-TVM Hardware-Software Stack for FPGA Acceleration of 8-bit ResNet-18 Inference
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Authors: Thierry Moreau
  • University of Washington
Tianqi Chen
  • University of Washington
Luis Ceze
  • University of Washington
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DBLP Key: conf/asplos/MoreauCC18
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